Modern integrated circuits are made up of literally millions of active devices such as transistors and capacitors. These devices are initially isolated from one another but are later interconnected together to form functional circuits. The quality of the interconnection structure drastically affects the performance and reliability of the fabricated circuit. Interconnections are increasingly determining the limits of performance and density of modern integrated circuits.
FIG. 1 is a cross-sectional illustration of a conventional interconnection structure used in the semiconductor industry. Metal interconnections 104 and 106, which are typically formed of copper, aluminum or alloys thereof, are used to couple active devices (not shown) into functional circuits. Metal interconnections 104 and 106 are electrically isolated from one another by a dielectric layer 108. Electrical connections are made between metal interconnections 104 and 106 through a metal via 112.
The interconnection structure of FIG. 1 experiences several problems. As integrated circuit dimensions decrease, in order to increase circuit density, vias are becoming smaller by the square of the dimension decrease. Such small vias can cause both reliability and performance problems in an integrated circuit. Reliability problems are caused by high concentrations of current or current crowding at the corner region 114 of the via 112. Current crowding in the corner region 114 can cause self-heating effects, hence electro-migration. As a result, voids, open circuits and other reliability problems arise.
Another problem is the poor step coverage of the diffusion barrier layer. The performance of small-dimensioned vias is adversely affected due to an increase in contact resistance caused by a reduction of the interfacial contact area between the via 112 and interconnections 104 and 106. The use of a diffusion barrier layer 116 further worsens the problem. Typically, copper, which is increasingly used for the formation of the via 112 and metal interconnections 104 and 106, diffuses into the dielectric layer 108 easily, shorting integrated circuits and causing circuit failure. The diffusion barrier layer 116 is therefore formed to prevent copper from diffusing into the dielectric layer 108. Since the sidewall of the via 112 is typically substantially vertical, thickness Ts of the diffusion barrier layer 116 on the sidewall is only a fraction of the thickness TB at the bottom. In order to have a diffusion barrier 116 with a sufficient thickness Ts on the sidewall, the thickness TB has to be greater than is necessary to be an effective barrier. The diffusion barrier layer 116 is typically formed of materials having much higher resistivity than copper, such as titanium, titanium nitride, tantalum, tantalum nitride, and the like. A diffusion barrier having a thicker bottom portion will have a significantly greater resistance. Since the resistance of the bottom portion of the diffusion barrier layer 116 is connected in series with the resistance of the via 112, the total interconnection resistance is significantly increased.
To solve the previously discussed problems, a tapered via has been designed, as illustrated in FIG. 2. A via 124, which connects metal interconnections 104 and 106, has at least a significant portion tapered. Since the sidewalls are slanted, the thickness difference of the diffusion barrier layer 126 on the sidewall and at the bottom of the via 124 is reduced, and overall via resistance is reduced.
Even with the structure shown in FIG. 2, metal interconnection still has significant effects on the performance and reliability of the integrated circuit. Thus, further performance and reliability improvement is needed.